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  • EK-S6-SP601-G
ID: 133652

Xilinx Spartan-6 FPGA SP601 Evaluation Kit

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Xilinx Spartan-6 FPGA SP601 Evaluation Kit

The Spartan®-6 FPGA SP601 Evaluation Kit is an ideal entry-level development environment for evaluating the Spartan-6 family. This kit delivers all the basic components of the Xilinx Base Targeted Design Platform in one package. It provides a flexible environment for system design and provides customers reference design and examples on how to leverage features such as the integrated memory interface core. It includes an industry-standard FMC (FPGA Mezzanine Card) connector for future scaling and customization to specific applications and markets.


Key Features

  • FPGA: XC6SLX16 CS324-2CES Spartan-6
  • Configuration:
    • Onboard configuration circuitry
    • 8MB Quad SPI Flash
    • 16MB Parallel (BPI) Flash
    • JTAG
  • Memory:
    • DDR2 Component Memory 128MB
    • IIC 8Kb IIC EEPROM
  • Communication:
    • 10/100/1000 Tri-Speed Ethernet PHY
    • Serial (UART) to USB Bridge
  • Expansion Connectors:
    • FMC-LPC connector (68 single-ended or 34 differential user defined signals)
    • 8 User I/O (Digilent 2x6 Header)
  • Clocking:
    • 200MHz Oscillator (Differential)
    • Socket (Single-Ended) Populated with 27MHz Osc
    • SMA Connectors (Differential)
  • Display:
    • 4x LEDs
  • Control:
    • 4x Push Buttons
    • 4x DIP Switches




What's Included

  • ROHS Compliant SP601 Base Board including the XC6SLX16-CS324-2CES FPGA
  • ISE WebPACK (Supporting both Windows and Linux)
    • ncludes Planahead™ Design Analysis Tool – Streamline your design process between synthesis and place-and-route as well as providing intuitive IO planning.
    • Includes Timing Driven Place and Route – Delivers optimal quality of results with advanced implementation algorithms.
    • Include SmartGuilde™ - Delivers industry’s fastest incremental implement runtimes.
    • Includes SmartXplorer Technology – Leverage computing resources for optimal quality of results.
    • ISE Simulator Lite – Integrated RTL simulation environment
  • Documentation
    • Hardware Setup Guide – Easy to follow instructions for getting your development board up and running in minutes so you can begin evaluation
    • Getting Started Guide – Complete instructions enabling you to evaluate and modify designs included in your evaluation kit.
    • Hardware Users Guide – Detailed guide providing information about the hardware included in your kit
    • Reference Design and Example User Guide – Instructions for using the included reference design and design examples included in your kit
    • Schematics and PCB files – Information you need to accelerate layout and development of your board based upon best practices
  • Cables
    • Universal 5V power supply
    • Two USB cables – enabling BIST and device configuration
    • One Ethernet cable – host communication to the base reference design interface
  • Reference Designs and Demonstration
    • Base Reference Design – Design that includes gigabit host communication, DDR2 memory interface, example programmable processing and serial loopback optimized for the Spartan-6 FPGA family.
    • Base Reference Design Interface and Demonstration – Evaluate different implementations and see results in this convenient, easy to use interface
  • Examples Designs and Demonstrations
    • Board Diagnostic Demo
    • Base System Reference Design featuring DSP48, Gigabit Ethernet, and DDR2 Memory Controller
    • Multiboot Reference Design, featuring fail-safe configuration
    • Hardened Memory Controller Reference Design
  • USB Flash Drive
    • All reference designs, demos, and documents are delivered on a USB stick.







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