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Piotr Zbysiński, Jerzy Pasierbiński
Authors: Piotr Zbysiński, Jerzy Pasierbiński
Edition II Includes CD-ROM
Format: PDF, B5, 280 pages
BTC publishing house
Warsaw - paper edition 2004
The quickest way to get to know the properties of programmable systems and software used to implement designs of their own systems in them, applying them in practice, that is, performing individually selected exercises.
The book describes, step by step, the implementation of a project layout example in CPLD structures using design systems of two major manufacturers of programmable systems, i.e. Altera and Xilinx. There are many examples of layout descriptions in the ABEL, AHDL and VHDL languages. Modeling on them will certainly make it easier for readers to prepare their own descriptions themselves.
A laboratory system has been described that makes it possible to perform exercises with programmable systems by programming in them self-developed layout designs:
MSc. Piotr Zbysiński is the Program Editor, the Chairman of the Program Council of the monthly Elektronika Praktyczna. He deals with applications of programmable chips and popularization of this subject in the monthly. He is a co-author of the academic textbook "Programmable circuits in practice" (WKiŁ, 2002, 2nd Edition). Since 1997, he has been cooperating in the field of programmable systems with the Department of Telecommunications at the Warsaw University of Technology. Since 2000, he has been a member of the IEEE1532 working group, which deals with the development of a new ISP standard.
Dr inż. Jerzy Pasierbiński is a lecturer at the Faculty of Electronics, Military University of Technology. For many years he has lectured and practiced, initially in the field of semiconductor devices, and then digital circuits, including programmable systems. He is the author of scripts and co-author of books on the basics of electronics and programmable circuits, among others co-author of the academic textbook "Programmable circuits in practice", (WKiŁ, 2002, Wyd. II).