NETFPGA-SUME (410-301) - ACADEMIC (EDU)

ATTENTION! This product is for academic recipients (students and academic teachers) only!

After the ordering, please send us by e-mail the data listed below:

• the name and last name
• position (student, teacher)
• e-mail (with the University domain)
• University name
• Facultie / Section
• University address
• University phone no.

Description

The NetFPGA-SUME board is the ideal platform for high-performance and high-density networking design. A collaborative effort between Digilent, the University of Cambridge and Stanford University, the NetFPGA-SUME has everything you need to conduct cutting edge research and development of state-of-the-art networking systems.

The NetFPGA-SUME is an amazingly advanced board that features one of the largest and most complex FPGA’s ever produced, a Xilinx Virtex-7 690T supporting thirty 13.1 GHz GTH transceivers. Four SFP+ 10Gb/s ports, five independent high-speed memory banks built from both 500MHzQDRII+ & 1866MT/s DDR3 SoDIMM devices, and an eight-lane third generation PCIe offer incredible throughput and can sustain a large number of high-speed data streams to the FPGA fabric and memory devices. Other features include the presentation of twenty transceivers in total on FMC and QTH expansion connectors, and SATA ports. The NetFPGA-SUMEs main mission is to give students, researchers and developers a state-of-the-art platform for networking, whether it’s learning the fundamentals or creating new hardware and software applications. This board easily supports simultaneous wire-speed processing on the four 10Gb/s Ethernet ports, and it can manipulate and process data on-board, or stream it over the 8x Gen.3 PCIe interface and the expansion interfaces.

This board is supported by a large collection of free IP blocks available at www.netfpga.org.

Need more information? Please visit the NetFPGA-SUME Wiki Site.

Features

• Four SFP+ interface (4 RocketIO GTH transceivers) supporting 10Gbps
• PCI-E Gen3 x8 (8Gbps/lane)
• QTH Connector (8 RocketIO GTH transceivers)
• Two SATA-III ports
• One HPC FMC Connector (10 RocketIO GTH transceivers)
• Three x36 72Mbits QDR II SRAM (CY7C25652KV18-500BZC)
• Two 4GB DDR3 SODIMM (MT8KTF51264Hz-1G9E1)
• MicroUSB Connector for JTAG programming and debugging (shared with UART interface)
• Two 512Mbits Micron StrataFlash (PC28F512G18A)
• Xilinx CPLD XC2C512 for FPGA configuration
• User LEDs and Push Buttons

Connector(s):

• 4 SFP+ GTH Trancievers
• 1 PCIe Gen3
• 1 QTH
• 2 SATA-III ports
• 1 FMC
• 1 Micro USB for Programming/UART
• 1 Pmod™

Programming:

• Xilinx Vivado® Design Suite

Package Content

• 1 x NetFPGA-SUME