74AUP1G57GM

5M80ZE64C5N is a low-power CPLD from the MAX V series, featuring 80 logic elements, 64 macrocells, and 54 I/O pins, designed to implement complex logic functions in compact embedded applications. Flash-based technology enables non-volatile configuration, while the QFP‑64 package ensures compatibility with standard SMT processes.

74AUP2G125DC,125 is a dual-channel logic buffer with 3-state outputs, designed for ultra-low power applications with supply voltages starting from 0.8 V. The device offers high integration, extremely low quiescent current, and comes in a compact VSSOP‑8 package, making it an ideal solution for portable devices, IoT systems, and battery-powered applications requiring signal isolation and amplification.

TinyLogic UHS Dual Buffer witch Schmitt Trigger Inputs, SC706, Fairchild Semiconductor, RoHS