The Design Warrior's Guide to FPGAs

Field Programmable Gate Arrays (FPGAs) are devices that provide a fast, low-cost way for an embedded system, and can be reconfigured by the infinite number of times. In addition to introducing the latest generation of FPGAs, The Design Warrior's Guide is the FPGAs also covers different design tools and flows.

This book covers information ranging from schematic-driven entry, through traditional HDL / RTL-based simulation and logic synthesis, all the way up to the current state-of-the-art in pure C / C ++ design capture and technology. Also discussed are specialist areas of mixed-medium hardwave / software and DSP-based design flows, along with innovative new devices as programmable node arrays (FPNAs).

Clive "Max" Maxfield is a bestselling author and engineer in the electronic design industry (EDA) and embedded systems industry. In this comprehensive book, it's all about FPGAs in their product designs. While other books cover fragments of FPGA use for embedded systems.

* First book to focus exclusively and FPGA use in embedded designs

* World-renowned best-selling author

* Will help engineers get the right FPGA for any design project

Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players ?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C / C ++ etc.-Based Design Flows;
DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs is FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc .; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-Based
Design Flow; Future FPGA Developments; Appendix A:
Signal Integrity 101, Capacitive and inductive coupling (crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effects
Summary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know, with LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications,
Cyclic redundancy check applications.