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Kazimierz Wind
Author: Wiatr Kazimierz ISBN: 83-204-2846-7 Format: B5, 486 pages Hard cover Publisher: WNT |
About the book |
Book description The book presents methods of acceleration of calculations in computer systems intended for the implementation of calculations related to the processing of large amounts of data on the example of vision systems. These methods concern the construction of specialized heterogeneous computing systems, with particular emphasis on computing units (processors) and their interconnection (architecture). Specialized VLSI processors and frame grabber modules with built-in computing functions are described. Due to the reprogramming possibilities of the systems, a way of implementing specialized hardware processors in FPGA programmable systems has been presented. Further possibilities of acceleration of calculations are related to the use of multiprocessor architectures of general purpose processors and DSP processors (as shown in the example of the multiprocessor module of DSP processors). New possibilities in the field of building computing platforms are related to reconfigurable programmable systems. Their application was discussed taking into account the computational efficiency of such solutions and the construction of universal CCM platforms. The latest development of VirtexPro programmable systems allows for full integration in a single system of multiprocessor heterogeneous architecture, because in addition to the resources of programmable logic, they also provide the PowerPC general purpose processor units. The full use of these opportunities was discussed, related to the design of systems using the CoDesin Hardware / Software method. The book is intended for engineers, doctoral students and students of fields of study: information technology, automation and robotics as well as electronics, as well as for those interested in the broadly understood field of signal processing. Table of Contents Preface and thanks List of important shortcuts, markings and symbols 1. Introduction 2. Acceleration of real-time image processing calculations 3. Implementation of context-free pre-processing operations 4. Implementation of contextual image filtration 5. Modules of image acquisition and pre-processing 6. Dedicated architecture for image data processing 7. Specialized hardware processes implemented in FPGA circuits 8. Parameterization of the work speed of processes and used resources of the FPGA system 9. Optimization of implementation in FPGA systems of computational structures 10. Hardware acceleration of calculations for higher image processing levels 11. The use of multiprocess structures in the calculation of medium and high level of image processing 12. Dynamically reconfigurable systems implemented in FPGAs 13. CCM computational architecture dedicated to the user 14. Designing vision systems with the Hardware / Software CoDesign method Literature Index of things |
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Kazimierz Wind