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The Definitive Guide to the ARM Cortex-M3
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  • The Definitive Guide to the ARM Cortex-M3
ID: 175344
Joseph Yiu
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This ARM Cortex-M3 CPU features; it explains step-by-step how to program and implement the processor in real-world designs. It teaches readers how to utilize the complete and the thumb in order to obtain the best functionality, efficiency, and reuseability. The author, an ARM engineer who helped the core, provides many examples and diagrams that aiding understanding. Quick reference appendices make locating specific details a snap!

Whole chapters are dedicated to:
Debugging using the new CoreSight technology
Migrating effectively from the ARM7
The Memory Protection Unit
Interfaces, Exceptions, Interrupts
... and much more!

* ARM Cortex-M3 processor

* Easy-to-understand examples, diagrams, quick reference appendices, full instruction and Thumb-2

* The author, an ARM engineer on the M3 development team, teaches end users. M3, and how to migrate from the ARM7

Chapter 1 - Introduction

Chapter 2 - Overview of the Cortex-M3 Processor
Fundamental

Chapter 3 - Cortex-M3 Processor Basics

Chapter 4 - Instruction Set

Chapter 5 - Memory System

Chapter 6 - Cortex-M3 Processor Implementation Overview

Chapter 7 - Exceptions

Chapter 8 - NVIC and Interrupt Control

Chapter 9 - Interrupt Behavior

Chapter 10 - Cortex-M3 Processor Programming
overview

Chapter 11 - Exceptions Programming

Chapter 12 - Advance Programming Features & System Behavior

Chapter 13 - Memory Protection Unit (MPU)
overview

Chapter 14 - Other Cortex-M3 Processor Features
SYSTICK timer

Chapter 15 - Debug Architecture

Chapter 16 - Debug Components

Chapter 17 - Getting Started with Cortex-M3 Processor Development

Chapter 18 - Porting Applications from ARM7 to the Cortex-M3 Processor

Chapter 19 - Starting Cortex-M3 development using the GNU Tool Chain
code

Chapter 20 - Getting started with the RealView® Microcontroller Development Kit

Appendix I Cortex-M3 Instructions Summary

Appendix II - 16-bit Thumb Instructions and architecture versions

Appendix III - Cortex-M3 Exceptions Quick Reference

Appendix IV - NVIC Registers Quick Reference

Appendix V Cortex-M3 Trouble Shooting Guide
overview

index
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