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Designing CMOS integrated circuits
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  • Designing CMOS integrated circuits
ID: 178731

Andrzej Kos, Adam Gołda

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A handbook on basic problems in the field of designing CMOS integrated circuits, currently widely used in all fields of industry, telecommunications, medicine and many others. Basic knowledge about MOS transistors and elements used in CMOS technology as well as a description of software supporting hierarchical design of integrated circuits were given. The design of integrated circuits with bottom-up methods (from a single element to the system) and top-down (from the system's function to its physical implementation) is presented.
Recipients of the book: students of the faculties of electronics, telecommunications and computer science, technical universities, students of university informatics departments, PhD and postgraduate students.



Table of Contents:
Foreword 9
1. Introduction 11
2. Production of integrated circuits - from the idea to the tests - the course in a nutshell 15
2.1. Idea 16
2.2. Scheme and preliminary simulations 17
2.3. Topography and checking geometrical rules 17
2.4. Extraction of basic elements and comparison with scheme 19
2.5. Extraction of basic and parasitic elements and simulation 20
2.6. Fabrication and testing of the finished structure 20
2.7. Summary of the course in a nutshell 22
3. CMOS 23 systems
3.1. MOS transistors 23
3.2. Discrete transistor and transistor as a basic element of an integrated circuit 27
3.3. Parasitic capacities in CMOS 29 systems
3.4. Parameters of digital circuits 32
3.4.1. Transitional characteristics and interference margins 33
3.4.2. Load capacity of the gate 35
3.4.3. Dynamic properties 35
3.4.4. Energy consumption 36
3.4.5. Delay-Power Product (DP) 41
3.5. The basic elements of CMOS 41
3.5.1. Inverter 41
3.5.2. NAND 52 gate
3.5.3. NOR 56 gate
3.5.4. AOI and OAI 60 goals
3.5.5. The XOR 61 gate
3.5.6. Transmission gate 62
3.5.7. Triple-state buffer 62
3.5.8. Flip-flops 63
4. Software supporting hierarchical design of integrated circuits 66
5. Design of integrated circuits using the method from detail to the general 71
5.1. Circuit diagram - from transistors to the system 71
5.2. Functional verification 78
5.3. Topography creation 85
5.3.1. Design rules, or a compromise on production yield and system performance 85
5.3.2. Electrical parameters of layers 95
5.3.3. Connection of an integrated circuit with the outside world 106
5.3.4. Examples of topographies 112
5.4. Topography verification and sending the production system 114
6. Design of integrated circuits using the method from general to detail 118
6.1. The integrated circuit design cycle using the method from general to specific 118
6.2. Programming, compilation and simulation of the operation of systems using hardware description languages 119
6.3. Logical synthesis 122
6.4. Standard cells and automatic topography 124 generation
7. Production of integrated circuits 130
7.1. Production of a semiconductor structure 130
7.1.1. Preparation of a single crystal 131
7.1.2. Defects of monocrystalline structures 133
7.1.3. Shaping electrical components 138
7.1.4. Applying layers 138
7.1.5. Defects of deposited layers 151
7.1.6. Shaping layers - process, defects 153
7.1.7. Doping and soaking 161
7.1.8. Simplified production process of CMOS 165 structure
7.2. Advances in CMOS technology and the future of integrated circuits 169
8. Basics of the Verilog 175 language
8.1. Terminology 175
8.2. Module and ports 176
8.3. Basic constructions of the Verilog 180 language
8.3.1. Data types 180
8.3.2. Scalars and Vectors 183
8.3.3. Operations on vectors 185
8.3.4. Remembrance 187
8.3.5. Parameters 187
8.3.6. Tasks and functions 191
8.4. Syntax and conventions of the Verilog 194 language
8.4.1. Keywords 194
8.4.2. Identifiers 194
8.4.3. Comments 195
8.4.4. White signs 195
8.4.5. Fixed 195
8.5. Conducting and controlling simulation 197
8.5.1. Time and delays 197
8.5.2. Test module 198
8.5.3. Tasks and system functions 198
8.5.4. Compiler Directive 199
8.6. Hierarchy 201
8.7. Levels of modeling abstraction 204
8.8. Design at key and gate level 205
8.8.1. Predefined elements 206
8.8.2. Application examples 209
8.8.3. Own predefined elements 212
8.9. Design at the level of data flow 217
8.9.1. Operators 218
8.9.2. Concurrent assignments 221
8.9.3. Application examples 222
8.10. Designing at the behavioral level 225
8.10.1. Procedural blocks 225
8.10.2. Conditional and selection instructions 231
8.10.3. Loops 234
9. Electrothermal phenomena in integrated circuits 237
9.1. Thermal phenomena in solids 237
9.1.1. Types of heat exchange 238
9.1.2. Equation of heat conductivity in solids 240
9.1.3. The solution of the heat conduction equation in solids describing the operating conditions of encapsulated integrated circuits 243
9.2. Analysis of electrothermal interactions in integrated circuits 245
9.2.1. EThS - a tool for conducting electrothermal simulations in steady-state 246
9.2.2. Thermtest - a prototype integrated circuit to verify electrothermal phenomena in integrated circuits 247
9.2.3. Adaptation and verification of electrothermal models based on measurements of the Thermtest test system and simulations in the EThS 251 environment
9.2.4. Examples of electrothermal simulations 256
List of literature 259

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