Alchitry Au+ - development kit with Xilinx Artix 7 XC7A100T FPGA
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  • Alchitry Au+ - development kit with Xilinx Artix 7 XC7A100T FPGA
  • Alchitry Au+ - development kit with Xilinx Artix 7 XC7A100T FPGA
  • Alchitry Au+ - development kit with Xilinx Artix 7 XC7A100T FPGA
ID: 583780
zł2,648.34
Tax included

zł2,153.12 tax excl.

Evaluation kit equipped with Xilinx Artix 7 XC7A100T FPGA chip and 256 MB DDR3 RAM. The kit is supported by Vivado and the Verilog and Lucid languages. SparkFun DEV-17514

4 weeks
On request
Kamami is the official distributor of Sparkfun modules and development kits. All products of this brand in our offer are original and come directly from the manufacturer.

 

Free shipping

free shipping in Poland for all orders over 500 PLN

 

Same day shipping

If your payment will be credited to our account by 11:00

 

14 days for return

Each consumer can return the purchased goods within 14 days

Description

Alchitry Au+ is an evaluation kit equipped with a Xilinx Artix 7 XC7A100T FPGA chip with over 100,000 logic cells and 256 MB of DDR3 RAM. Offers 102 3.3V IO pins, 20 of which are switchable to 1.8V, nine differential analog inputs, eight general-purpose LEDs, built-in 100MHz clock that can be manipulated internally via FPGA, USB-C connector for configuration and power supply of the board and a USB interface for data transfer. The board also has a Qwiic connector, which facilitates the connection of sensors and expansion modules compatible with this standard.

Alchitry is a project aimed at providing the necessary tools for beginners to learn FPGA - from cheap kits, through numerous teaching aids and an integrated work environment.

The kit is powered by Vivado, the latest Xilinx design tools. The system can be programmed using standard languages ​​- Verilog and Lucid languages ​​are dedicated to the set, for which the manufacturer has prepared numerous tutorials.

Features

  • Artix 7 XC7A100T - 101,440 logic cells
  • 256MB DDR3 RAM
  • 102 IO pins (3.3V logic level, 20 of them can be switched to 1.8V for LVDS)
  • 9 differential analog inputs (1 dedicated, 8 mixed with digital IO)
  • USB C to configure and power the board
  • 8 general purpose LEDs
  • 1 button (typically used as a reset)
  • 100 MHz on-board clock (can be multiplied internally by the FPGA)
  • Powered with 5V through USB C port, 0.1" holes, or headers
  • USB to serial interface for data transfer (up to 12Mbaud)
  • Dimensions of 65mm x 45mm
583780

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