EK-K7-KC705-G

EK-K7-KC705-G - Xilinx Kintex-7 FPGA KC705 Evaluation Kit

Overview

The Kintex®-7 FPGA KC705 Evaluation Kit includes all the basic components of hardware, design tools, IP, and pre-verified reference designs including a targeted design enabling high-performance serial connectivity and advanced memory interfacing. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards.

Included

• KC705 Evaluation Board featuring the XC7K325T-2FFG900C FPGA
• Targeted Reference Design featuring DDR3 and PCIe®
  • Including evaluation version of Northwest Logic DMA
• AMS 101 Evaluation Card
• Full seat of Vivado® Design Suite: Design Edition
  • Device-locked to the Kintex-7 XC7K325T FPGA
• Printed Getting Started Guide
• Cables & Power Supply
• Additional downloadable content including
  • Reference Designs, Design Examples, and Demos
  • Board Design Files
  • Extensive Documentatio

KC705 Base Board

Key Features - KC705 Base Board

• FPGA: Kintex XC7K325T-2FFG900C
  • ROHS compliant KC705 kit including the XC7K325T-2FFG900C FPGA
• Configuration
  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
  • 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
  • 16MB (128Mb) Quad SPI Flash
• Memory
  • 1GB DDR3 SODIMM 800MHz / 1600Mbps
  • 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
  • 16MB (128Mb) Quad SPI Flash
  • 8Kb IIC EEPROM
  • SD Card Slot
• Communication & Networking
  • Gigabit Ethernet GMII, RGMII and SGMII
  • SFP / SFP+ cage
  • GTX port (TX, RX) with four SMA connectors
  • UART To USB Bridge
  • PCI Express x8 edge connector
• Display
  • HDMI Video output
  • External Phy/codec device driving an HDMI Connector
  • 2x16 LCD display
  • 8x LEDs
• Expansion Connectors
  • FMC-HPC (Partial Population) connector (4 GTX Transceiver, 116 single-ended or 58 differential (34 LA & 24 HA) user defined signals)
  • FMC-LPC connector (1 GTX Transceiver, 68 single-ended or 34 differential user defined signals)
  • Vadj can support 1.8V, 2.5V, or 3.3V
  • IIC
• Clocking
  • Fixed Oscillator with differential 200MHz output
    • Used as the “system” clock for the FPGA
  • Programmable Oscillator with 156.250 MHz as the default output
    • Default frequency targeted for Ethernet applications but oscillator is programmable for many end uses
  • Differential SMA clock input
  • Differential SMA GTX reference clock input
  • Jitter attenuated clock
    • Used to support CPRI/OBSAI applications that perform clock recovery from a user-supplied SFP/SFP+ module
• Control & I/O
  • 5X Push Buttons
  • 4X DIP Switches
  • Diff Pair I/O (1 SMA pair)
  • AMS FAN Header (2 I/O)
  • 7 I/O pins available through LCD header
• Power
  • 12V wall adapter or ATX
  • Voltage and Current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies (IIC path to FPGA)
• Analog
  • XADC header

AMS 101 Evaluation Card

Key Features - AMS 101 Evaluation Card

• Analog evaluation card connects to XADC header
• Evaluates XADC 12-bit, 17-channel, 1Msps dual ADCs and Analog Mixed Signal technology
• Pins and BNC mini grabbers allow for external analog input signals
• On-board 16-bit dual DAC for analog test signals
  • Reference designs allow sine wave or DC test signals
• AMS101 Evaluation card pairs with free AMS Evaluator tool for analyzing analog data, internal temperature and voltage measurements, and saving data to a .csv file