TerasIC C5G (P0150)

Terasic Spider is a six-legged robot rolling with 18 servos controlled by the Altera DE0-Nano-SoC board connecting the FPGA chip and the ARM Cortex-A9 processor. The set contains a complex robot and numerous accessories. P0425

The development board with the Aria 10 GX FPGA chip is ideal for projects requiring high memory capacity, fast data transmission and effective power management. Terasic P0489

Altera DE0 NANO Development and Education Board introduces a compact-sized FPGA development platform suited for prototyping circuit designs such as robots and "portable" projects. The board is designed to be used in the simplest possible implementation targeting the Cyclone IV device up to 22,320 LEs.

Set with FPGA Terasic DE10-Nano board and WiFi module. Designed for projects using FPGA to work in the cloud. TerasIC P0700

TerasIC XSFP/SFP+HSMC (P0092) enables the development of 10G Ethernet systems based on the XAUI interface, featuring two SFP+ channels and a 156.25 MHz reference clock. Designed for integration with FPGA boards equipped with an HSMC connector — including Stratix IV GX and DE4 — the module is used in networking projects, data transmission applications, and high-throughput interface testing.

Integrated single board computer with Cyclone V SoC core. SoC SoM includes DDR3 memory, Flash memory, energy management system, common interface controllers and disc software (BSP). Terasic P0581

The robot can recognize the attitude in real time using an acceleration and gyroscope sensor, as well as achieve balance by controlling the motors to adjust the position. Terasic P0582

VEEK-MT2S is a development board based on the Cyclone V SX SoC Cyclone V SX SoC-5CSXFC6D6F31C6N chip. Included in addition to the board with programmable FPGA, there are also a 7-inch TFT touchscreen with a resolution of 800 x 480 pixels, 8 megapixel camera (3264 x 2448 pixels), light sensor IMU 9DOF sensor (accelerometer, gyroscope, magnetometer) . Terasic K0161

TerasIC ICB-HSMC is a communication card for FPGA systems, equipped with RS-232, RS-485, and CAN interfaces, as well as GPIO and PIO ports for expansion. It enables rapid deployment and testing of industrial communication systems and the implementation of fieldbuses in automation and control applications.

The Terasic LT24 is a 2.4” LCD touch module with 240(H) x 320(V) display resolution. It can be bundled with various Terasic FPGA development boards through the 2x20 GPIO interface. P0185

TerasIC XTS-HSMC is an expansion card for FPGA platforms with transceivers, enabling signal conversion to SMA connectors and rapid prototyping of high-throughput interfaces. It is useful in compliance testing, transmission quality evaluation, and projects requiring reliable data transfer at gigabit speeds.

Development platform based on Intel MAX 10 FPGA. The system provides the user with 50,000 logical elements and 1638 kbits M9K and 5888 kbits Flash. The board contains components such as built-in USB-Blaster II, QSPI Flash, ADC connector, WS2812B RGB LED and 2x6 TMD connector. Academic version. TerasiC T-Core P0633

The DE10-Standard Development Kit presents a robust hardware design platform built around the Intel System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. P0493

Terasic Atum A5 Development Kit – an advanced Intel Agilex 5 FPGA kit for AI, vision systems, and high-bandwidth applications. Terasic Atum A5 Development Kit