TerasIC ADA-GPIO – Highspeed AD/DA Conversion Card GPIO P0007

The ADC-SoC is a SoC FPGA motherboard with dual-channel high-speed ADC

Altera DE0 NANO Development and Education Board introduces a compact-sized FPGA development platform suited for prototyping circuit designs such as robots and "portable" projects. The board is designed to be used in the simplest possible implementation targeting the Cyclone IV device up to 22,320 LEs.

The TerasIC HDMI v1.4 (P0087) module enables the implementation of a complete HDMI transmit–receive chain in FPGA systems. With support for Full HD resolution, compliance with HDMI 1.4a, and included reference designs, it serves as a versatile solution for testing, learning, and deploying video transmission in embedded and multimedia applications.

TerasIC SATA/SAS HSMC is a specialized expansion card enabling the implementation and testing of mass storage interfaces in FPGA systems. With support for SATA and SAS protocols and compatibility with advanced FPGA devices, it serves as a tool for developing data storage applications, compliance testing, and SoC system development.

TerasIC USB Blaster Download Cable (UBT) is a fully Altera USB Blaster–compatible JTAG/ISP programmer for CPLD and FPGA devices. With a reliable design and resistance to interference, it is a universal tool for designers working with Altera programmable devices. TerasIC P0302

Terasic Atum A5 Development Kit – an advanced Intel Agilex 5 FPGA kit for AI, vision systems, and high-bandwidth applications. Terasic Atum A5 Development Kit

MAX 10 Plus is a development kit based on the FPGA chip from Intel, equipped with 50,000 programmable logic elements. p0638

TerasIC AD/DA Data Conversion Card is a universal analog-to-digital and digital-to-analog data conversion card designed for FPGA systems. With high sampling speed and a built-in audio codec, it is well-suited for DSP, telecommunications, and educational applications.

The Terasic DE25-Nano development board with Agilex™ 5 FPGA and ARM Cortex-A76/A55 HPS system is a modern platform for AI applications, vision processing, and embedded systems. A rich set of interfaces and memory, active cooling, and compact dimensions allow it to be used both in prototyping and in final industrial solutions.

Terasic Spider is a six-legged robot rolling with 18 servos controlled by the Altera DE0-Nano-SoC board connecting the FPGA chip and the ARM Cortex-A9 processor. The set contains a complex robot and numerous accessories. P0425

Terasic DE10-Lite is a cost-effective Altera MAX 10 based FPGA board. Kit contains lots of reference designs and software utilities for users to easily develop their applications based on these design resources

The robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system.

The Terasic DE25-Nano development board with Agilex™ 5 FPGA and ARM Cortex-A76/A55 HPS system is a modern platform for AI applications, vision processing, and embedded systems. A rich set of interfaces and memory, active cooling, and compact dimensions allow it to be used both in prototyping and in final industrial solutions.

FPGA starter kit with Intel Stratix 10 SX chip. The module has integrated transceivers that transmit data at speeds up to 28.3 Gb/s, making DE10-Pro fully compatible with version 3.0 of the PCI Express standard. The DE10-Pro offers fast parallel Flash memory and four SO-DIMMs that have 4 GB DDR4 SDRAM. Terasic P0627

Development platform based on Intel MAX 10 FPGA. The system provides the user with 50,000 logical elements and 1638 kbits M9K and 5888 kbits Flash. The board contains components such as built-in USB-Blaster II, QSPI Flash, ADC connector, WS2812B RGB LED and 2x6 TMD connector. Academic version. TerasiC T-Core P0633

The TerasIC P0057 kit enables testing, debugging, and signal simulation in systems using the HSMC interface. It is intended for design and diagnostic work with FPGA main boards and other systems equipped with an HSMC connector.