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TerasIC XSFP/SFP+HSMC (P0092) enables the development of 10G Ethernet systems based on the XAUI interface, featuring two SFP+ channels and a 156.25 MHz reference clock. Designed for integration with FPGA boards equipped with an HSMC connector — including Stratix IV GX and DE4 — the module is used in networking projects, data transmission applications, and high-throughput interface testing.
The XSFP/SFP+HSMC expansion module enables the implementation of 10G Ethernet systems using FPGA transceivers compatible with the XAUI interface. The board features two full-duplex SFP+ channels based on the BCM8727 chipset, which performs XAUI-to-SFI conversion. It provides a complete hardware platform for developing network systems with Altera GX-series FPGAs (Arria GX, Arria II GX, Stratix II GX, Stratix IV GX) and is designed for integration with development boards equipped with an HSMC connector.
The programmable clock generator Si5334C delivers a 156.25 MHz reference clock accessible through both SMA connectors and the HSMC interface. The board also includes MDIO and I²C EEPROM interfaces, supporting HSMC identification and user data storage. Each channel is equipped with four bi-color LEDs for visual monitoring of interface activity.
Manufacturer BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
Responsible person BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
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TerasIC XSFP/SFP+HSMC (P0092) enables the development of 10G Ethernet systems based on the XAUI interface, featuring two SFP+ channels and a 156.25 MHz reference clock. Designed for integration with FPGA boards equipped with an HSMC connector — including Stratix IV GX and DE4 — the module is used in networking projects, data transmission applications, and high-throughput interface testing.