Terasic DE0-Nano
Altera DE0 NANO Development and Education Board
Overview
The DE0-Nano board introduces a compact-sized FPGA development platform suited for prototyping circuit designs such as robots and "portable" projects. The board is designed to be used in the simplest possible implementation targeting the Cyclone IV device up to 22,320 LEs.
The DE0-Nano has a collection of interfaces including two external GPIO headers to extend designs beyond the DE0-Nano board, on-board memory devices including SDRAM and EEPROM for larger data storage and frame buffering, as well as general user peripheral with LEDs and push-buttons.
The advantages of the DE0-Nano board include its size and weight, as well as its ability to be reconfigured without carrying superfluous hardware, setting itself apart from other general purpose development boards. In addition, for mobile designs where portable power is crucial, the DE0-Nano provides designers with three power scheme options including a USB mini-AB port, 2-pin external power header and two DC 5V pins.
Specification
Cyclone® IV EP4CE22F17C6N FPGA
- 22,320 Logic elements (LEs)
- 594 Embedded memory (Kbits)
- 66 Embedded 18 x 18 multipliers
- 4 General-purpose PLLs
- 153 Maximum FPGA I/O pins
Configuration Status and Set-Up Elements
- On-board USB-Blaster circuit for programming
- Altera serial configuration device – EPCS16
Expansion Header
- Two 40-pin Headers (GPIOs) provides 72 I/O pins
- Two 5V power pins, two 3.3V power pins and four ground pins
- One 26-pin header provides 16 digital I/O pins and 8 analog input pins to connect to analog sensors, etc
Memory Devices
- 32MB SDRAM
- 2Kb I2C EEPROM
General User Input/Output
- 8 green LEDs
- 2 debounced push-buttons
- 4 dip switches
G-Sensor
- ADI ADXL345, 3-axis accelerometer with high resolution (13-bit)
A/D Converter
- NS ADC128S022, 8-Channel, 12-bit A/D Converter
- 50 ksps to 200 ksps
Clock System
- On-board 50MHz clock oscillator
Power Supply
- USB Type mini-AB port (5V)
- Two DC 5V pins of the GPIO headers (5V)
- 2-pin external power header (3.6-5.7V)
Connect D5M
- Connect with 5-megapixel CMOS Sensor (D5M)
Connect LTM
- Connect with LCD Touch Screen Module (LTM)
![]()
Connect THDB-ADA
- Connect with Analog to Digital/Digital to Analog Conversion Daughter Card (THDB-ADA)
Layout
Resources
| Title | Version | Size(KB) | Date Added | Download |
|---|---|---|---|---|
| DE0_Nano_User_manual | - | 9200 | 2011-01-25 | ![]() |

Kit Contents

Code: P0082
Manufacturer BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
Responsible person BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
TerasIC DE0 is a complete evaluation kit based on the Cyclone III FPGA, designed for learning, testing, and implementing digital systems. It offers a wide range of interfaces and peripherals enabling the creation of complex projects for both educational and industrial purposes.
No product available!
[EDUCATIONAL PRICE] Terasic DE0 Board evaluation kit for Altera Cyclone III FPGA devices. It is equipped with all basic peripherals enabling research and evaluation work with FPGAs, including a JTAG programmer-configurator. The reduced price (compared to the standard Terasic DE0 version) applies exclusively to schools, universities, lecturers, pupils, and students.
No product available!
Altera DE0 NANO Development and Education Board introduces a compact-sized FPGA development platform suited for prototyping circuit designs such as robots and "portable" projects. The board is designed to be used in the simplest possible implementation targeting the Cyclone IV device up to 22,320 LEs.
The Terasic LT24 is a 2.4” LCD touch module with 240(H) x 320(V) display resolution. It can be bundled with various Terasic FPGA development boards through the 2x20 GPIO interface. P0185
A set of elements designed for evaluation sets with programmable circuits of the Cyclone V SoC FPGA family, which includes; 7-inch TFT display with touch support (5-points), 8 megapixel camera with autofocus and sensors (light, accelerometer, gyroscope, magnetometer). Terasic P0494
No product available!
Terasic HDMI-FMC is a HDMI transmitter/receiver daughter board with FMC (FPGA Mezzanine card) interface
Gigabit Ethernet transceiver with an FMC interface. Up to 1 Gbps network transfers with the host board using an FMC connector. NET-FMC can be connected any FMC(HPC) interfaces. Terasic P0481
No product available!
The DE10-Standard Development Kit presents a robust hardware design platform built around the Intel System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. P0493
The DE10-Standard Development Kit presents a robust hardware design platform built around the Intel System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. P0493
No product available!
Programmable Logic IC Development Tools Cyclone V SE 5CSEMA4U23C6N + 800MHz Dual-core ARM Cortex-A9 processor. Terasic P0496
Programmable Logic IC Development Tools Cyclone V SE 5CSEMA4U23C6N + 800MHz Dual-core ARM Cortex-A9 processor. Terasic P0496
VEEK-MT2S is a development board based on the Cyclone V SX SoC Cyclone V SX SoC-5CSXFC6D6F31C6N chip. Included in addition to the board with programmable FPGA, there are also a 7-inch TFT touchscreen with a resolution of 800 x 480 pixels, 8 megapixel camera (3264 x 2448 pixels), light sensor IMU 9DOF sensor (accelerometer, gyroscope, magnetometer) . Terasic K0161
No product available!
VEEK-MT2S is a development board based on the Cyclone V SX SoC Cyclone V SX SoC-5CSXFC6D6F31C6N chip. Included in addition to the board with programmable FPGA, there are also a 7-inch TFT touchscreen with a resolution of 800 x 480 pixels, 8 megapixel camera (3264 x 2448 pixels), light sensor IMU 9DOF sensor (accelerometer, gyroscope, magnetometer) . Terasic K0161
No product available!
The adapter is designed to connect boards with a PCIe connector to a computer. Can support PCIe Gen3 x4 interface. Terasic P0492
The development board with the Aria 10 GX FPGA chip is ideal for projects requiring high memory capacity, fast data transmission and effective power management. Terasic P0489
No product available!
The Terasic VEEK-MT2 set provides a complete hardware-software platform for designing embedded and multimedia systems using FPGA chips. It enables the creation and testing of interactive, control, and measurement applications thanks to an extensive base of interfaces, memory, and sensors.
No product available!
The robot can recognize the attitude in real time using an acceleration and gyroscope sensor, as well as achieve balance by controlling the motors to adjust the position. Terasic P0582
No product available!
Integrated single board computer with Cyclone V SoC core. SoC SoM includes DDR3 memory, Flash memory, energy management system, common interface controllers and disc software (BSP). Terasic P0581
No product available!
Development kit with SoC FPGA Inter Arria 10. Dedicated to industrial embedded applications with high performance requirements. Terasic P0506
No product available!
FPGA starter kit equipped with Cyclone V GT with 301K LE and supports PCIe Gen 2x4. The board has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0559
No product available!
Altera DE0 NANO Development and Education Board