OpenEP4CE6-C Package A with Altera FPGA EP4CE6E22C8N and accessories - Waveshare 6715

VEEK-MT2S is a development board based on the Cyclone V SX SoC Cyclone V SX SoC-5CSXFC6D6F31C6N chip. Included in addition to the board with programmable FPGA, there are also a 7-inch TFT touchscreen with a resolution of 800 x 480 pixels, 8 megapixel camera (3264 x 2448 pixels), light sensor IMU 9DOF sensor (accelerometer, gyroscope, magnetometer) . Terasic K0161

Development platform based on Intel MAX 10 FPGA. The system provides the user with 50,000 logical elements and 1638 kbits M9K and 5888 kbits Flash. The board contains components such as built-in USB-Blaster II, QSPI Flash, ADC connector, WS2812B RGB LED and 2x6 TMD connector. Academic version. TerasiC T-Core P0633

Evaluation module with Intel Stratix 10 SoC processor with 2800K logic elements. The module has DDR4 SDRAM memory (up to 64 GB), built-in USB-Blaster II, Ethernet, microSD, miniUSB and expandable FMC/FMC+ connectors. TerasIC Apollo S10 SoM Board (P0630)

Industrial Networking Kit (INK)

Altera Cyclone IV EP4CE6E22C8N FPGA development board in the set with the base board and expansion modules. Waveshare OpenEP4CE6-C Package B

DE1-SoC Development Kit

MAX 10 10M50DAF484C6G with 50K LEs, DDR3 with ECC, QSPI Flash, MicroSD Card, Ethernet, Audio codec, HDMI RX, Acceleromter, ADC, DAC, 8-Mega pixel color camera and 7" 5-point touch screen. P0800

VEEK-MT2S is a development board based on the Cyclone V SX SoC Cyclone V SX SoC-5CSXFC6D6F31C6N chip. Included in addition to the board with programmable FPGA, there are also a 7-inch TFT touchscreen with a resolution of 800 x 480 pixels, 8 megapixel camera (3264 x 2448 pixels), light sensor IMU 9DOF sensor (accelerometer, gyroscope, magnetometer) . Terasic K0161

Altera Cyclone IV EP4CE6E22C8N FPGA development board in the set with the base board. Waveshare OpenEP4CE6-C Standard

Programmable Logic IC Development Tools Cyclone V SE 5CSEMA4U23C6N + 800MHz Dual-core ARM Cortex-A9 processor. Terasic P0496

Development platform based on Intel MAX 10 FPGA. The system provides the user with 50,000 logical elements and 1638 kbits M9K and 5888 kbits Flash. The board contains components such as embedded USB-Blaster II, QSPI Flash, ADC connector, WS2812B RGB LED and 2x6 TMD connector. TerasiC T-Core P0633

MAX 10 Plus is a development kit based on the FPGA chip from Intel, equipped with 50,000 programmable logic elements. p0638

Cyclone IV GX Transceiver Starter Kit

The robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system.

FPGA starter kit with Intel Stratix 10 SX chip. The module has integrated transceivers that transmit data at speeds up to 28.3 Gb/s, making DE10-Pro fully compatible with version 3.0 of the PCI Express standard. The DE10-Pro offers fast parallel Flash memory and four SO-DIMMs that have 4 GB DDR4 SDRAM. Terasic P0627

Development kit with Apollo S10 module and base board. Equipped with an Intel Stratix 10 SoC processor with 2800K logic elements, has a DDR4 SDRAM memory (up to 64 GB), built-in USB-Blaster II, Ethernet, microSD, miniUSB and QSFP connectors and USB type C. TerasIC Apollo Developer Kit (P0671)