zł5,085.72 tax excl.
FPGA starter kit equipped with Cyclone V GT with 301K LE and minicomputer with Intel Celeron Dual Core (64 GB eMMC, 4 GB RAM). The FPGA module has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0650
OpenVINO is an FPGA starter kit in the form of a card with a PCIe connector and a PC kit with an Intel Celeron Dual Core chip. The kit is equipped with a programmable Cyclone V GT system with 301K LE and supports PCIe Gen 2x4. FPGA has 1 GB of DDR3 memory, 64 MB of SDRAM memory, UART-USB interface and extensions such as GPIO or allowing to connect Arduino extensions. The PC system is equipped with 64 GB eMMC memory and 4 GB DDR4 RAM. This makes the OpenVINO starter kit a configurable platform combining high computing performance and low energy consumption.
The OpenVINO package contains reference projects for all peripherals of the set and detailed instructions for programmers.
CPU system (PC)
FPGA OpenVINO Starter Kit
Description of components and connectors


Block diagram

Manufacturer BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
Responsible person BTC Korporacja sp. z o. o. Lwowska 5 05-120 Legionowo Poland sprzedaz@kamami.pl 22 767 36 20
FPGA starter kit equipped with Cyclone V GT with 301K LE and supports PCIe Gen 2x4. The board has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0559
No product available!
[EDUCATIONAL PRICE] FPGA starter kit equipped with Cyclone V GT with 301K LE and supports PCIe Gen 2x4. The board has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0559
No product available!
[EDUCATIONAL PRICE] FPGA starter kit equipped with Cyclone V GT with 301K LE and minicomputer with Intel Celeron Dual Core (64 GB eMMC, 4 GB RAM). The FPGA module has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0650
No product available!
The TerasIC HDMI v1.4 (P0087) module enables the implementation of a complete HDMI transmit–receive chain in FPGA systems. With support for Full HD resolution, compliance with HDMI 1.4a, and included reference designs, it serves as a versatile solution for testing, learning, and deploying video transmission in embedded and multimedia applications.
No product available!
TerasIC TR4-530 (P0109) is an FPGA development kit featuring the Stratix IV GX device, offering high logic performance, high-speed DDR3 memory support, and extensive expandability through HSMC and PCIe connectors. The platform is designed for prototyping digital systems, PCI Express applications, and real-time data processing.
No product available!
TerasIC TR4-230 (P0107) provides a development platform based on the Stratix IV GX FPGA, featuring a wide range of interfaces and support for PCI Express projects and high-speed DDR3 memory. The solution is designed for communication systems, ASIC prototyping, and applications requiring high logic resource capacity.
No product available!
TerasIC CLR-HSMC (P0079) enables the integration of industrial cameras with a Camera Link interface into FPGA boards via the HSMC connector, supporting image transmission in base, medium, and dual base modes. The module is used in vision systems, production lines, and projects involving real-time image processing.
No product available!
TerasIC XSFP/SFP+HSMC (P0092) enables the development of 10G Ethernet systems based on the XAUI interface, featuring two SFP+ channels and a 156.25 MHz reference clock. Designed for integration with FPGA boards equipped with an HSMC connector — including Stratix IV GX and DE4 — the module is used in networking projects, data transmission applications, and high-throughput interface testing.
No product available!
2x16 LCD Module (No Backlight)
Stratix V GX FPGA Video Development System
No product available!
Cyclone V E FPGA Video Development System
No product available!
No product available!
The robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system.
The Terasic LT24 is a 2.4” LCD touch module with 240(H) x 320(V) display resolution. It can be bundled with various Terasic FPGA development boards through the 2x20 GPIO interface. P0185
No product available!
DE1-SoC + 5 points multitouch display MTL2
MAX 10 10M50DAF484C6G with 50K LEs, DDR3 with ECC, QSPI Flash, MicroSD Card, Ethernet, Audio codec, HDMI RX, Acceleromter, ADC, DAC, 8-Mega pixel color camera and 7" 5-point touch screen. P0800
No product available!
Terasic Spider is a six-legged robot rolling with 18 servos controlled by the Altera DE0-Nano-SoC board connecting the FPGA chip and the ARM Cortex-A9 processor. The set contains a complex robot and numerous accessories. P0425
FPGA starter kit equipped with Cyclone V GT with 301K LE and minicomputer with Intel Celeron Dual Core (64 GB eMMC, 4 GB RAM). The FPGA module has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0650