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TerasIC DE0-CV (P0192) - EDU
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  • TerasIC DE0-CV (P0192) - EDU
  • TerasIC DE0-CV - EDU zestaw oparty na FPGA Cyclone V 5CEBA4F23C7N
  • TerasIC DE0-CV - EDU zestaw oparty na FPGA Cyclone V 5CEBA4F23C7N
ID: 234477

The robust hardware design platform which uses the Altera Cyclone V FPGA device as the center control for its peripherals such as the on-board USB Blaster, video capabilities etc. Contains all components needed to use the board in conjunction with a computer that runs the Microsoft Windows XP or later

Retired
 

Free shipping

free shipping in Poland for all orders over 500 PLN

 

Same day shipping

If your payment will be credited to our account by 11:00

 

14 days for return

Each consumer can return the purchased goods within 14 days


ATTENTION! This product is for academic recipients (students and academic teachers) only!

After the ordering, please send us by e-mail the data listed below:

  • the name and last name
  • position (student, teacher)
  • e-mail (with the University domain)
  • University name
  • Facultie / Section
  • University address
  • University phone no.
  • End user application

Description

The DE0 Development and Education board is designed in a compact size with all the essential tools for novice users to gain knowledge in areas of digital logic, computer organization and FPGAs. It is equipped with Altera Cyclone III 3C16 FPGA device, which offers 15,408 LEs. The board provides 346 user I/O pins, and is loaded with a rich set of features that makes it suitable to be used for advanced university and college courses, as well as the development of sophisticated digital systems. The DE0 combines the Altera low-power, low-cost, and high performance Cyclone III FPGA to control the various features of the DE0 Board. The DE0 Development Board includes software, reference designs, and accessories required to ensure the user simple access in evaluating their DE0 Board.

Features

Development Kit Hardware Contents

  • 8MB SDRAM; 4MB Flash; SD Card Socket
  • On-board USB-Blaster; EPCS4 Device
  • VGA Output up to 1280x1024@60Hz resolution
  • RS-232 and PS/2 Ports
  • Two 40-pin GPIO Expansion Headers

Development Kit Software Contents

  • DE0-CV System Builder- create a Quartus II project with top-level design file, pin assignments, and I/O standard settings automatically.
  • DE0-CV Control Panel - allows users to access various components on the DE0-Nano board from a host computer.
  • Schematic and Mechanical Drawing
  • Reference Designs for Various Interfaces onboard
  • DE0-CV Debounce Project with Debounce IP

Schematic block of DE0-CV

234477

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