FPGA Development Board with Agilex 5 and HPS ARM Cortex-A76/A55 - Terasic DE25-Nano (academic version)

A set of elements designed for evaluation sets with programmable circuits of the Cyclone V SoC FPGA family, which includes; 7-inch TFT display with touch support (5-points), 8 megapixel camera with autofocus and sensors (light, accelerometer, gyroscope, magnetometer). Terasic P0494

TerasIC XSFP/SFP+HSMC (P0092) enables the development of 10G Ethernet systems based on the XAUI interface, featuring two SFP+ channels and a 156.25 MHz reference clock. Designed for integration with FPGA boards equipped with an HSMC connector — including Stratix IV GX and DE4 — the module is used in networking projects, data transmission applications, and high-throughput interface testing.

Evaluation module with Intel Stratix 10 SoC processor with 2800K logic elements. The module has DDR4 SDRAM memory (up to 64 GB), built-in USB-Blaster II, Ethernet, microSD, miniUSB and expandable FMC/FMC+ connectors. TerasIC Apollo S10 SoM Board (P0630)

FPGA starter kit equipped with Cyclone V GT with 301K LE and supports PCIe Gen 2x4. The board has 1 GB DDR3 memory, 64 MB SDRAM memory, UART-USB interface and extensions such as GPIO and Arduino. Terasic P0559

TerasIC DE0 is a complete evaluation kit based on the Cyclone III FPGA, designed for learning, testing, and implementing digital systems. It offers a wide range of interfaces and peripherals enabling the creation of complex projects for both educational and industrial purposes.

TerasIC NET is an HSMC-standard Ethernet module enabling rapid implementation of network communication in FPGA systems. With support for speeds from 10 Mb/s to 1 Gb/s and full integration with FPGA devices, it is a convenient tool for designing applications that require reliable network communication.

Development kit with Apollo S10 module and base board. Equipped with an Intel Stratix 10 SoC processor with 2800K logic elements, has a DDR4 SDRAM memory (up to 64 GB), built-in USB-Blaster II, Ethernet, microSD, miniUSB and QSFP connectors and USB type C. TerasIC Apollo Developer Kit (P0671)

The ADC-SoC is a SoC FPGA motherboard with dual-channel high-speed ADC

TerasIC ADA-GPIO is an AD/DA conversion card enabling compatibility with multiple FPGA boards through GPIO and HSMC interfaces. With high sampling speed and wide compatibility, it is well-suited for DSP, educational, and communication applications.

TerasIC DVI-HSMC is an FPGA expansion card with a DVI transmitter and receiver, enabling support for high-resolution video signals in multimedia projects and image processing systems. With compatibility with Terasic and Altera platforms, it offers rapid deployment and testing of visual applications based on FPGA devices.

[EDUCATIONAL PRICE] Terasic DE0 Board evaluation kit for Altera Cyclone III FPGA devices. It is equipped with all basic peripherals enabling research and evaluation work with FPGAs, including a JTAG programmer-configurator. The reduced price (compared to the standard Terasic DE0 version) applies exclusively to schools, universities, lecturers, pupils, and students.

The DE10-Standard Development Kit presents a robust hardware design platform built around the Intel System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. P0493

DE1-SoC + 5 points multitouch display MTL2

Computation accelerator module based on Intel® Agilex ™ FPGA. It has a PCI Express Gen 4.0 x16 slot, two 200G QSFP-DD connectors, and offers 32GB DDR4. Terasic DE10-Agilex (P0701)

TerasIC XTS-HSMC is an expansion card for FPGA platforms with transceivers, enabling signal conversion to SMA connectors and rapid prototyping of high-throughput interfaces. It is useful in compliance testing, transmission quality evaluation, and projects requiring reliable data transfer at gigabit speeds.

The TerasIC HDMI_RX P0083 module enables HDMI signal reception via the HSMC interface in FPGA systems. Thanks to compliance with HDMI and HDCP standards and the available reference design, it provides a complete solution for implementing, testing, and analyzing video transmission in embedded applications and image processing systems.