74AUP2G125DC.125

Description

Logic device from the AUP (Advanced Ultra-Low Power) family, featuring two independent non-inverting buffers/drivers with 3-state outputs. Designed to operate at very low supply voltages (from 0.8 V to 3.6 V), making it suitable for integration into modern, energy-efficient digital systems. Each channel includes an independent output enable (OE) input for signal line isolation. The device offers extremely low quiescent current (max. 500 nA) and is housed in a compact VSSOP‑8 package, ideal for mobile, IoT, and battery-powered applications.

Features

• Logic family: AUP (Ultra-Low Power CMOS)
• Number of channels: 2
• Polarity: non-inverting
• Inputs/outputs: 2/2
• 3-state outputs (with OE control)
• Supply voltage: 0.8 V to 3.6 V
• Supported logic levels: 1.8 V / 2.5 V / 3.3 V
• Output current: ±4 mA
• Quiescent current: max. 500 nA
• Operating current: typ. 1.4 μA
• Propagation delay (depending on Vcc): from 19 ns to 5.8 ns
• Mounting style: SMD/SMT
• Package: VSSOP‑8
• Dimensions: 2.1 mm × 2.4 mm × 0.85 mm
• Operating temperature: –40 °C to +125 °C
• Technology: CMOS
• RoHS compliant