JTAG HS1

JTAG HS1
JTAG High Speed Programming Cable

The JTAG-HS1 programming cable is a high-speed programming solution for Xilinx FPGAs. It is compatible with all Xilinx tools, including iMPACT, Chipscope, and EDK. The HS1 attaches to target boards using Digilent’s 6-pin, 100-mil spaced programming header, or Xilinx’s 2x7, 2mm connector (using the included adaptor).

The JTAG-HS1 is powered from a PC’s USB port. The HS1 can be seamlessly driven from Xilinx’s iMPACT software or from Digilent’s Adept software. It will be recognized as a Digilent programming cable when connected to a PC, whether or not it is attached to the target board. A separate Vdd pin is provided on the HS1 to supply JTAG signal buffers. These high speed, 24mA, three-state buffers allow target boards to use JTAG signal voltages from 1.8V to 5V, with bus speeds of up to 30MBit/sec. The HS1’s Vdd pin must be tied to the same voltage supply that drives the JTAG port on the FPGA.

JTAG signals are held in high-impedance except when actively driven during programming, so the JTAG bus can be shared with other devices. The HS1 uses a standard Type-A to Micro-USB cable (included with the HS1) that attaches to the end of the module opposite the system board connector. The HS1 is small and light, allowing it to be held firmly in place by the system board connector.

Note for use with Adept: The JTG-HS1 requires Adept System 2.8.1 or newer for use in Windows, and Adept Runtime 2.8.2 or newer for use in Linux.

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Key Features:

• Small, complete, all-in-one JTAG programming solution for Xilinx FPGAs
• High-Speed USB2 port can drive JTAG/SPI bus at up to 30Mbit/sec
• Compatible with all Xilinx tools
• Fully supported by the Adept SDK, allowing custom JTAG/SPI applications to be created
• Separate Vref drives JTAG/SPI signal voltages; Vref can be any voltage between 1.8V and 5V.
• JTAG/SPI frequency settable by user
• SPI programming solution (modes 0 and 2 supported)
• Uses micro-AB USB2 connector

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Code: 410-205