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8 Mega Pixel Digital Camera Package with FMC interface (P0449)

8 Mega Pixel Digital Camera Package with FMC interface

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ID: 563141

219,43€ gross (23% VAT)
178,40€ net

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Description

Terasic D8M-FMC is a 8-megapixel camera kit with a FMC low pin count connector interface. It includes a MIPI camera module, MIPI decoder, and HDMI-TX.

The MIPI camera module captures image and sends it out in a MIPI video signal package. This packet is converted in a 10-bit parallel Bayer pattern through a MIPI decoder. The data is transmitted through a FMC connector. The MIPI camera module has a built-in Voice Coil Motor (VCM) to control its focal length. Users can adjust it via I2C interface. The D8M-FMC also includes a HDMI-TX for deveopers to display the processed video image on a monitor with HDMI input when the FPGA main board has no display capabilities.

The FMC connector is the standard expansion interface defined in VITA 57.1. Any main boards with a FMC connector can interface with D8M-FMC.

Terasic D8M-FMC kit also includes camera capture and display reference designs. It comes in two versions. One is RTL code only and the other one uses components such as Altera VIP in Qsys. It enables users to rapidly be familiar with the operation of the camera module and develop custom applications based on these examples.

Specifications

  • Package Interface: FMC with 1.8/2.5/3.0/3.3V I/O standard
  • MIPI Camera Module:
    • Chip P/N: OV8865
    • Color Filter Arrangement: Bayer Pattern
    • View Angel: 70 degrees
    • Lens Type: 1/3.2 inch
    • Pixels: 3264x2448 (8-megapixels)
    • Frame Rate: Maximal 60 frame per second at 1408 x 792 resolution and 30 frame per second at 3268 x 2448 resolution
    • Support Focus Control
    • Interface: MIPI
  • MIPI Decoder:
    • Chip P/N: TC358748XBG
    • MIPI CSI-2 Compliant
    • MIPI to Parallel Port Converter
    • Supports up to 4 data lanes
  • HDMI TX v1.4
  • Package Size: 73.4x60.0 mm

Block Diagram

The functional block diagram of D8M-FMC is shown above. MIPI Camera Module sends the video captured to MIPI Decoder via MIPI link. MIPI Decoder converts MIPI Video Data to parallel data and output to the main board through a FMC connector. The parameters of the MIPI Camera Module and MIPI Decoder can be configured by FPGA via I2C interface. For instance, number of output pixels from MIPI Camera Modules, RGB gain, position of focus, PLL of MIPI Decoder, and parameters of Video MIPI Decoder etc.

The D8M-FMC also includes a HDMI-TX for deveopers to display the processed video image on a monitor with HDMI input when the FPGA main board has no display capabilities.

Activity

The D8M-FMC Package is designed for FPGA main boards with FMC expansion header.

  • Connect D8M-FMC with Terasic TR5

  • Connect D8M-FMC with Altera A10SoC FPGA Board
  • Connect D8M-FMC with Altera A10GFP Board

Layout

Package Includes

1. D8M-FMC
2. Screw & Copper Pillar Pakage
3. CD Download Guide

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